The present disclosure relates to coupling a multi-core processor's dynamic frequency control system to the multi-core processor's dynamic voltage control system to reduce core voltage of cores that are not controlling system frequency.
Multi-core processors provide faster task processing by distributing portions of parallel processing tasks among multiple cores. To achieve parallel processing functionality, multi-core processors synchronize the cores to provide a close coupling between the different cores for memory access tasks, control information passing, etc.
Multi-core processors typically perform trade-offs between operating voltage and operating frequency. When a core requires faster operating frequency, the core typically requires higher voltage. A multi-core processor may use a dynamic frequency control system that automatically adjusts frequencies (system clock) “on the fly” depending upon frequency requirements of the multi-core processor.
Multi-core processors may also implement a dynamic voltage control system to increase or decrease core voltages based upon system requirements. For example, the dynamic voltage control system may increase voltage when the multi-core processor requires increased performance, or decrease voltage to conserve power when the multi-core processor does not require increased performance.
In a multi-core system where one clocking system drives multiple processor cores, a single core may require the system frequency to be increased and, in turn, require a higher voltage. As such, the other cores waste power because they operate at a higher frequency and higher voltage when they do not require the increase in performance.